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Turrican3

Autore Topic: AMD: prossimi alla "fine" della Legge di Moore?  (Letto 1004 volte)

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Offline Turrican3

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Re:AMD: prossimi alla "fine" della Legge di Moore?
« Risposta #15 il: 22 Luglio, 2019, 23:32:18 »
Certo, bisogna vedere quando Intel e Nvidia scenderanno a 7nm o meno, che tipo di gap prestazionale riusciranno a proporre (se ci sarà, 'sto gap).
:hmm:

Non so Nvidia ma per Intel parrebbe che ci vogliano almeno due anni ancora:

https://www.bit-tech.net/news/tech/cpus/intel-ceo-blames-aggression-for-10nm-missteps/1/

Offline Bluforce

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Re:AMD: prossimi alla "fine" della Legge di Moore?
« Risposta #16 il: 23 Luglio, 2019, 09:05:38 »
Urca. Mi sembrano tanti due anni nel mondo della tecnologia :hmm:

Offline Turrican3

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Re:AMD: prossimi alla "fine" della Legge di Moore?
« Risposta #17 il: 23 Luglio, 2019, 10:35:47 »
Citazione
Samsung Foundry unfurled its transistor roadmap this week, which included the introduction of gate-all-around FETs starting at 3nm using nanosheets.
[...]
Those chips are expected to provide about a 20% improvement in power and performance, he said, compared with about a 30% to 40% increase in power and performance in previous technology generations.
[...]
Exactly how quantum effects will impact designs below 5nm isn’t at all clear at this point. What is clear is that there are more effects to deal with, and much more engineering will be required throughout the supply chain.

https://semiengineering.com/quantum-effects-at-7-5nm/


Citazione
Compared to nanowires, the nanosheet FET has a wider channel, which translates into more performance and drive current in devices. That’s why nanosheets are gaining momentum in the market.

But migrating to nanosheet or nanowire FETs is not a simple matter. For one thing, the performance and scaling benefits of a gate-all-around device is debatable. “The industry needs to get a major increase in functionality as well as a small increase in transistor costs to justify the use of 3nm,” said Handel Jones, chief executive of International Business Strategies (IBS). “The problem is the definition of 3nm and (understanding) the real benefits of gate-all-around.”

Design costs are also a problem. Generally, IC design costs have jumped from $51.3 million for a 28nm planar device to $297.8 million for a 7nm chip and $542.2 million for 5nm, according to IBS. But at 3nm, IC design costs range from a staggering $500 million to $1.5 billion, according to IBS. The $1.5 billion figure involves a complex GPU at Nvidia.


Fig. 2: IC design costs escalate Source: IBS

For that reason, customers likely will stay at certain nodes longer, such as 16nm/14nm and 7nm, before even thinking about switching to 3nm. Some may never move to 3nm. And if or when gate-all-around appears, it may get pushed out beyond its target date of 2021.

https://semiengineering.com/big-trouble-at-3nm/

C'è solo l'imbarazzo della scelta in questo sito. :sweat:
Alla fine della fiera il succo rimane il medesimo: i costi continuano a salire e i "salti" prestazionali diventano sempre più striminziti, sia in termini assoluti che relativi.

 

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